Defined in 3 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 9295 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 13004 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 11635 (as a macro)