Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 43 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 54 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 106 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 232 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 942 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 855 (as a macro)

Referenced in 6 files:

• drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c, line 261
• drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c, line 587
• drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
  • line 664
  • line 673
  • line 808
  • line 815
• drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
  • line 303
  • line 310
  • line 371
  • line 380
• drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
  • line 372
  • line 379
  • line 420
  • line 428
  • line 438
• drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
  • line 389
  • line 396