Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 296 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 1460 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 1054 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 1016 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h, line 1700 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h, line 902 (as a macro)