Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h, line 48 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h, line 46 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 52 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 68 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 150 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 328 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 536 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 943 (as a macro)