# SPDX-License-Identifier: GPL-2.0-only
config [31mCONFIG_MTD_NAND_ECC_SW_HAMMING[0m
tristate
config [31mCONFIG_MTD_NAND_ECC_SW_HAMMING_SMC[0m
bool "NAND ECC Smart Media byte order"
depends on [31mCONFIG_MTD_NAND_ECC_SW_HAMMING[0m
default n
help
Software ECC according to the Smart Media Specification.
The original Linux implementation had byte 0 and 1 swapped.
menuconfig [31mCONFIG_MTD_RAW_NAND[0m
tristate "Raw/Parallel NAND Device Support"
depends on [31mCONFIG_MTD[0m
select [31mCONFIG_MTD_NAND_CORE[0m
select [31mCONFIG_MTD_NAND_ECC_SW_HAMMING[0m
help
This enables support for accessing all type of raw/parallel
NAND flash devices. For further information see
<http://www.linux-mtd.infradead.org/doc/nand.html>.
if [31mCONFIG_MTD_RAW_NAND[0m
config [31mCONFIG_MTD_NAND_ECC_SW_BCH[0m
bool "Support software BCH ECC"
select [31mCONFIG_BCH[0m
default n
help
This enables support for software [31mCONFIG_BCH[0m error correction. Binary [31mCONFIG_BCH[0m
codes are more powerful and cpu intensive than traditional Hamming
ECC codes. They are used with NAND devices requiring more than 1 bit
of error correction.
comment "Raw/parallel NAND flash controllers"
config [31mCONFIG_MTD_NAND_DENALI[0m
tristate
config [31mCONFIG_MTD_NAND_DENALI_PCI[0m
tristate "Denali NAND controller on Intel Moorestown"
select [31mCONFIG_MTD_NAND_DENALI[0m
depends on [31mCONFIG_PCI[0m
help
Enable the driver for NAND flash on Intel Moorestown, using the
Denali NAND controller core.
config [31mCONFIG_MTD_NAND_DENALI_DT[0m
tristate "Denali NAND controller as a DT device"
select [31mCONFIG_MTD_NAND_DENALI[0m
depends on [31mCONFIG_HAS_DMA[0m && [31mCONFIG_HAVE_CLK[0m && [31mCONFIG_OF[0m
help
Enable the driver for NAND flash on platforms using a Denali NAND
controller as a DT device.
config [31mCONFIG_MTD_NAND_AMS_DELTA[0m
tristate "Amstrad E3 NAND controller"
depends on [31mCONFIG_MACH_AMS_DELTA[0m || [31mCONFIG_COMPILE_TEST[0m
default y
help
Support for NAND flash on Amstrad E3 (Delta).
config [31mCONFIG_MTD_NAND_OMAP2[0m
tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
depends on [31mCONFIG_ARCH_OMAP2PLUS[0m || [31mCONFIG_ARCH_KEYSTONE[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
and Keystone platforms.
config [31mCONFIG_MTD_NAND_OMAP_BCH[0m
depends on [31mCONFIG_MTD_NAND_OMAP2[0m
bool "Support hardware based BCH error correction"
default n
select [31mCONFIG_BCH[0m
help
This config enables the ELM hardware engine, which can be used to
locate and correct errors when using [31mCONFIG_BCH[0m ECC scheme. This offloads
the cpu from doing ECC error searching and correction. However some
legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
so this is optional for them.
config [31mCONFIG_MTD_NAND_OMAP_BCH_BUILD[0m
def_tristate [31mCONFIG_MTD_NAND_OMAP2[0m && [31mCONFIG_MTD_NAND_OMAP_BCH[0m
config [31mCONFIG_MTD_NAND_AU1550[0m
tristate "Au1550/1200 NAND support"
depends on [31mCONFIG_MIPS_ALCHEMY[0m
help
This enables the driver for the NAND flash controller on the
AMD/Alchemy 1550 SOC.
config [31mCONFIG_MTD_NAND_NDFC[0m
tristate "IBM/MCC 4xx NAND controller"
depends on [31mCONFIG_4xx[0m
select [31mCONFIG_MTD_NAND_ECC_SW_HAMMING_SMC[0m
help
NDFC Nand Flash Controllers are integrated in IBM/AMCC's [31mCONFIG_4xx[0m SoCs
config [31mCONFIG_MTD_NAND_S3C2410[0m
tristate "Samsung S3C NAND controller"
depends on [31mCONFIG_ARCH_S3C24XX[0m || [31mCONFIG_ARCH_S3C64XX[0m
help
This enables the NAND flash controller on the S3C24xx and S3C64xx
SoCs
No board specific support is done by this driver, each board
must advertise a platform_device for the driver to attach.
config [31mCONFIG_MTD_NAND_S3C2410_DEBUG[0m
bool "Samsung S3C NAND controller debug"
depends on [31mCONFIG_MTD_NAND_S3C2410[0m
help
Enable debugging of the S3C NAND driver
config [31mCONFIG_MTD_NAND_S3C2410_CLKSTOP[0m
bool "Samsung S3C NAND IDLE clock stop"
depends on [31mCONFIG_MTD_NAND_S3C2410[0m
default n
help
Stop the clock to the NAND controller when there is no chip
selected to save power. This will mean there is a small delay
when the is NAND chip selected or released, but will save
approximately 5mA of power when there is nothing happening.
config [31mCONFIG_MTD_NAND_TANGO[0m
tristate "Tango NAND controller"
depends on [31mCONFIG_ARCH_TANGO[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables the NAND Flash controller on Tango chips.
config [31mCONFIG_MTD_NAND_SHARPSL[0m
tristate "Sharp SL Series (C7xx + others) NAND controller"
depends on [31mCONFIG_ARCH_PXA[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
config [31mCONFIG_MTD_NAND_CAFE[0m
tristate "OLPC CAFÉ NAND controller"
depends on [31mCONFIG_PCI[0m
select [31mCONFIG_REED_SOLOMON[0m
select [31mCONFIG_REED_SOLOMON_DEC16[0m
help
Use NAND flash attached to the CAFÉ chip designed for the [31mCONFIG_OLPC[0m
laptop.
config [31mCONFIG_MTD_NAND_CS553X[0m
tristate "CS5535/CS5536 (AMD Geode companion) NAND controller"
depends on [31mCONFIG_X86_32[0m
depends on ![31mCONFIG_UML[0m && [31mCONFIG_HAS_IOMEM[0m
help
The CS553x companion chips for the AMD Geode processor
include NAND flash controllers with built-in hardware ECC
capabilities; enabling this option will allow you to use
these. The driver will check the MSRs to verify that the
controller is enabled for NAND, and currently requires that
the controller be in MMIO mode.
If you say "m", the module will be called cs553x_nand.
config [31mCONFIG_MTD_NAND_ATMEL[0m
tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller"
depends on [31mCONFIG_ARCH_AT91[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
select [31mCONFIG_GENERIC_ALLOCATOR[0m
select [31mCONFIG_MFD_ATMEL_SMC[0m
help
Enables support for NAND Flash / Smart Media Card interface
on Atmel AT91 processors.
config [31mCONFIG_MTD_NAND_ORION[0m
tristate "Marvell Orion NAND controller"
depends on [31mCONFIG_PLAT_ORION[0m
help
This enables the NAND flash controller on Orion machines.
No board specific support is done by this driver, each board
must advertise a platform_device for the driver to attach.
config [31mCONFIG_MTD_NAND_MARVELL[0m
tristate "Marvell EBU NAND controller"
depends on [31mCONFIG_PXA3xx[0m || [31mCONFIG_ARCH_MMP[0m || [31mCONFIG_PLAT_ORION[0m || [31mCONFIG_ARCH_MVEBU[0m || \
[31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables the NAND flash controller driver for Marvell boards,
including:
- [31mCONFIG_PXA3xx[0m processors (NFCv1)
- 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
- 64-bit Aramda platforms (7k, 8k) (NFCv2)
config [31mCONFIG_MTD_NAND_SLC_LPC32XX[0m
tristate "NXP LPC32xx SLC NAND controller"
depends on [31mCONFIG_ARCH_LPC32XX[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
chips) NAND controller. This is the default for the PHYTEC 3250
reference board which contains a NAND256R3A2CZA6 chip.
Please check the actual NAND chip connected and its support
by the SLC NAND controller.
config [31mCONFIG_MTD_NAND_MLC_LPC32XX[0m
tristate "NXP LPC32xx MLC NAND controller"
depends on [31mCONFIG_ARCH_LPC32XX[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
controller. This is the default for the WORK92105 controller
board.
Please check the actual NAND chip connected and its support
by the MLC NAND controller.
config [31mCONFIG_MTD_NAND_CM_X270[0m
tristate "CM-X270 modules NAND controller"
depends on [31mCONFIG_MACH_ARMCORE[0m
config [31mCONFIG_MTD_NAND_PASEMI[0m
tristate "PA Semi PWRficient NAND controller"
depends on [31mCONFIG_PPC_PASEMI[0m
help
Enables support for NAND Flash interface on PA Semi PWRficient
based boards
config [31mCONFIG_MTD_NAND_TMIO[0m
tristate "Toshiba Mobile IO NAND controller"
depends on [31mCONFIG_MFD_TMIO[0m
help
Support for NAND flash connected to a Toshiba Mobile IO
Controller in some PDAs, including the Sharp SL6000x.
config [31mCONFIG_MTD_NAND_BRCMNAND[0m
tristate "Broadcom STB NAND controller"
depends on [31mCONFIG_ARM[0m || [31mCONFIG_ARM64[0m || [31mCONFIG_MIPS[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables the Broadcom NAND controller driver. The controller was
originally designed for Set-Top Box but is used on various BCM7xxx,
BCM3xxx, BCM63xxx, iProc/Cygnus and more.
config [31mCONFIG_MTD_NAND_BCM47XXNFLASH[0m
tristate "BCM4706 BCMA NAND controller"
depends on [31mCONFIG_BCMA_NFLASH[0m
depends on [31mCONFIG_BCMA[0m
help
[31mCONFIG_BCMA[0m bus can have various flash memories attached, they are
registered by bcma as platform devices. This enables driver for
NAND flash memories. For now only BCM4706 is supported.
config [31mCONFIG_MTD_NAND_OXNAS[0m
tristate "Oxford Semiconductor NAND controller"
depends on [31mCONFIG_ARCH_OXNAS[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables the NAND flash controller on Oxford Semiconductor SoCs.
config [31mCONFIG_MTD_NAND_MPC5121_NFC[0m
tristate "MPC5121 NAND controller"
depends on [31mCONFIG_PPC_MPC512x[0m
help
This enables the driver for the NAND flash controller on the
MPC5121 SoC.
config [31mCONFIG_MTD_NAND_GPMI_NAND[0m
tristate "Freescale GPMI NAND controller"
depends on [31mCONFIG_MXS_DMA[0m
help
Enables NAND Flash support for IMX23, IMX28 or IMX6.
The GPMI controller is very powerful, with the help of [31mCONFIG_BCH[0m
module, it can do the hardware ECC. The GPMI supports several
NAND flashs at the same time.
config [31mCONFIG_MTD_NAND_FSL_ELBC[0m
tristate "Freescale eLBC NAND controller"
depends on [31mCONFIG_FSL_SOC[0m
select [31mCONFIG_FSL_LBC[0m
help
Various Freescale chips, including the 8313, include a NAND Flash
Controller Module with built-in hardware ECC capabilities.
Enabling this option will enable you to use this to control
external NAND devices.
config [31mCONFIG_MTD_NAND_FSL_IFC[0m
tristate "Freescale IFC NAND controller"
depends on [31mCONFIG_FSL_SOC[0m || [31mCONFIG_ARCH_LAYERSCAPE[0m || [31mCONFIG_SOC_LS1021A[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
select [31mCONFIG_FSL_IFC[0m
select [31mCONFIG_MEMORY[0m
help
Various Freescale chips e.g P1010, include a NAND Flash machine
with built-in hardware ECC capabilities.
Enabling this option will enable you to use this to control
external NAND devices.
config [31mCONFIG_MTD_NAND_FSL_UPM[0m
tristate "Freescale UPM NAND controller"
depends on [31mCONFIG_PPC_83xx[0m || [31mCONFIG_PPC_85xx[0m
select [31mCONFIG_FSL_LBC[0m
help
Enables support for NAND Flash chips wired onto Freescale PowerPC
processor localbus with User-Programmable Machine support.
config [31mCONFIG_MTD_NAND_VF610_NFC[0m
tristate "Freescale VF610/MPC5125 NAND controller"
depends on ([31mCONFIG_SOC_VF610[0m || [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND Flash Controller on some Freescale
processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
The driver supports a maximum 2k page size. With 2k pages and
64 bytes or more of OOB, hardware ECC with up to 32-bit error
correction is supported. Hardware ECC is only enabled through
device tree.
config [31mCONFIG_MTD_NAND_MXC[0m
tristate "Freescale MXC NAND controller"
depends on [31mCONFIG_ARCH_MXC[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables the driver for the NAND flash controller on the
MXC processors.
config [31mCONFIG_MTD_NAND_SH_FLCTL[0m
tristate "Renesas SuperH FLCTL NAND controller"
depends on [31mCONFIG_SUPERH[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Several Renesas SuperH CPU has FLCTL. This option enables support
for NAND Flash using FLCTL.
config [31mCONFIG_MTD_NAND_DAVINCI[0m
tristate "DaVinci/Keystone NAND controller"
depends on [31mCONFIG_ARCH_DAVINCI[0m || ([31mCONFIG_ARCH_KEYSTONE[0m && [31mCONFIG_TI_AEMIF[0m) || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enable the driver for NAND flash chips on Texas Instruments
DaVinci/Keystone processors.
config [31mCONFIG_MTD_NAND_TXX9NDFMC[0m
tristate "TXx9 NAND controller"
depends on [31mCONFIG_SOC_TX4938[0m || [31mCONFIG_SOC_TX4939[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables the NAND flash controller on the TXx9 SoCs.
config [31mCONFIG_MTD_NAND_SOCRATES[0m
tristate "Socrates NAND controller"
depends on [31mCONFIG_SOCRATES[0m
help
Enables support for NAND Flash chips wired onto Socrates board.
source "drivers/mtd/nand/raw/ingenic/Kconfig"
config [31mCONFIG_MTD_NAND_FSMC[0m
tristate "ST Micros FSMC NAND controller"
depends on [31mCONFIG_OF[0m && [31mCONFIG_HAS_IOMEM[0m
depends on [31mCONFIG_PLAT_SPEAR[0m || [31mCONFIG_ARCH_NOMADIK[0m || [31mCONFIG_ARCH_U8500[0m || [31mCONFIG_MACH_U300[0m || \
[31mCONFIG_COMPILE_TEST[0m
help
Enables support for NAND Flash chips on the ST Microelectronics
Flexible Static Memory Controller (FSMC)
config [31mCONFIG_MTD_NAND_XWAY[0m
bool "Lantiq XWAY NAND controller"
depends on [31mCONFIG_LANTIQ[0m && [31mCONFIG_SOC_TYPE_XWAY[0m
help
Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
to the External Bus Unit (EBU).
config [31mCONFIG_MTD_NAND_SUNXI[0m
tristate "Allwinner NAND controller"
depends on [31mCONFIG_ARCH_SUNXI[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND Flash chips on Allwinner SoCs.
config [31mCONFIG_MTD_NAND_HISI504[0m
tristate "Hisilicon Hip04 NAND controller"
depends on [31mCONFIG_ARCH_HISI[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND controller on Hisilicon SoC Hip04.
config [31mCONFIG_MTD_NAND_QCOM[0m
tristate "QCOM NAND controller"
depends on [31mCONFIG_ARCH_QCOM[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND flash chips on SoCs containing the EBI2 NAND
controller. This controller is found on IPQ806x SoC.
config [31mCONFIG_MTD_NAND_MTK[0m
tristate "MTK NAND controller"
depends on [31mCONFIG_ARCH_MEDIATEK[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND controller on MTK SoCs.
This controller is found on mt27xx, mt81xx, mt65xx SoCs.
config [31mCONFIG_MTD_NAND_MXIC[0m
tristate "Macronix raw NAND controller"
depends on [31mCONFIG_HAS_IOMEM[0m || [31mCONFIG_COMPILE_TEST[0m
help
This selects the Macronix raw NAND controller driver.
config [31mCONFIG_MTD_NAND_TEGRA[0m
tristate "NVIDIA Tegra NAND controller"
depends on [31mCONFIG_ARCH_TEGRA[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
Enables support for NAND flash controller on NVIDIA Tegra SoC.
The driver has been developed and tested on a Tegra 2 SoC. DMA
support, raw read/write page as well as HW ECC read/write page
is supported. Extra OOB bytes when using HW ECC are currently
not supported.
config [31mCONFIG_MTD_NAND_STM32_FMC2[0m
tristate "Support for NAND controller on STM32MP SoCs"
depends on [31mCONFIG_MACH_STM32MP157[0m || [31mCONFIG_COMPILE_TEST[0m
help
Enables support for NAND Flash chips on SoCs containing the FMC2
NAND controller. This controller is found on STM32MP SoCs.
The controller supports a maximum 8k page size and supports
a maximum 8-bit correction error per sector of 512 bytes.
config [31mCONFIG_MTD_NAND_MESON[0m
tristate "Support for NAND controller on Amlogic's Meson SoCs"
depends on [31mCONFIG_ARCH_MESON[0m || [31mCONFIG_COMPILE_TEST[0m
select [31mCONFIG_MFD_SYSCON[0m
help
Enables support for NAND controller on Amlogic's Meson SoCs.
This controller is found on Meson SoCs.
config [31mCONFIG_MTD_NAND_GPIO[0m
tristate "GPIO assisted NAND controller"
depends on [31mCONFIG_GPIOLIB[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_HAS_IOMEM[0m
help
This enables a NAND flash driver where control signals are
connected to GPIO pins, and commands and data are communicated
via a memory mapped interface.
config [31mCONFIG_MTD_NAND_PLATFORM[0m
tristate "Generic NAND controller"
depends on [31mCONFIG_HAS_IOMEM[0m
help
This implements a generic NAND driver for on-SOC platform
devices. You will need to provide platform-specific functions
via platform_data.
comment "Misc"
config [31mCONFIG_MTD_SM_COMMON[0m
tristate
default n
config [31mCONFIG_MTD_NAND_NANDSIM[0m
tristate "Support for NAND Flash Simulator"
help
The simulator may simulate various NAND flash chips for the
[31mCONFIG_MTD[0m nand layer.
config [31mCONFIG_MTD_NAND_RICOH[0m
tristate "Ricoh xD card reader"
default n
depends on [31mCONFIG_PCI[0m
select [31mCONFIG_MTD_SM_COMMON[0m
help
Enable support for Ricoh R5C852 xD card reader
You also need to enable ether
NAND [31mCONFIG_SSFDC[0m (SmartMedia) read only translation layer' or new
expermental, readwrite
'SmartMedia/xD new translation layer'
config [31mCONFIG_MTD_NAND_DISKONCHIP[0m
tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"
depends on [31mCONFIG_HAS_IOMEM[0m
select [31mCONFIG_REED_SOLOMON[0m
select [31mCONFIG_REED_SOLOMON_DEC16[0m
help
This is a reimplementation of [31mCONFIG_M[0m-Systems DiskOnChip 2000,
Millennium and Millennium Plus as a standard NAND device driver,
as opposed to the earlier self-contained [31mCONFIG_MTD[0m device drivers.
This should enable, among other things, proper JFFS2 operation on
these devices.
config [31mCONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED[0m
bool "Advanced detection options for DiskOnChip"
depends on [31mCONFIG_MTD_NAND_DISKONCHIP[0m
help
This option allows you to specify nonstandard address at which to
probe for a DiskOnChip, or to change the detection options. You
are unlikely to need any of this unless you are using LinuxBIOS.
Say 'N'.
config [31mCONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS[0m
hex "Physical address of DiskOnChip" if [31mCONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED[0m
depends on [31mCONFIG_MTD_NAND_DISKONCHIP[0m
default "0"
help
By default, the probe for DiskOnChip devices will look for a
DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
This option allows you to specify a single address at which to probe
for the device, which is useful if you have other devices in that
range which get upset when they are probed.
(Note that on PowerPC, the normal probe will only check at
0xE4000000.)
Normally, you should leave this set to zero, to allow the probe at
the normal addresses.
config [31mCONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH[0m
bool "Probe high addresses"
depends on [31mCONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED[0m
help
By default, the probe for DiskOnChip devices will look for a
DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
This option changes to make it probe between 0xFFFC8000 and
0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
useful to you. Say 'N'.
config [31mCONFIG_MTD_NAND_DISKONCHIP_BBTWRITE[0m
bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
depends on [31mCONFIG_MTD_NAND_DISKONCHIP[0m
help
On DiskOnChip devices shipped with the [31mCONFIG_INFTL[0m filesystem (Millennium
and 2000 TSOP/Alon), Linux reserves some space at the end of the
device for the Bad Block Table (BBT). If you have existing [31mCONFIG_INFTL[0m
data on your device (created by non-Linux tools such as [31mCONFIG_M[0m-Systems'
DOS drivers), your data might overlap the area Linux wants to use for
the BBT. If this is a concern for you, leave this option disabled and
Linux will not write BBT data into this area.
The downside of leaving this option disabled is that if bad blocks
are detected by Linux, they will not be recorded in the BBT, which
could cause future problems.
Once you enable this option, new filesystems ([31mCONFIG_INFTL[0m or others, created
in Linux or other operating systems) will not use the reserved area.
The only reason not to enable this option is to prevent damage to
preexisting filesystems.
Even if you leave this disabled, you can enable BBT writes at module
load time (assuming you build diskonchip as a module) with the module
parameter "inftl_bbt_write=1".
endif # [31mCONFIG_MTD_RAW_NAND[0m