Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 11081 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 10893 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 12147 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 2177 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 2037 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 10697 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h, line 816 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h, line 227 (as a macro)