Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 6730 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 6892 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 8237 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 1530 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 5459 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 1852 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 1496 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 1458 (as a macro)