Defined in 9 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 1627 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 1457 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 1556 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 1970 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 1217 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 1336 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 10497 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 12808 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 11378 (as a macro)

Referenced in 2 files:

• drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c
  • line 143
  • line 193
  • line 225
• drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c
  • line 172
  • line 222
  • line 254