Defined in 4 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 4084 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 5315 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 11894 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 10201 (as a macro)