# SPDX-License-Identifier: GPL-2.0-only config [31mCONFIG_CRYPTO_DEV_CCP_DD[0m tristate "Secure Processor device driver" depends on [31mCONFIG_CPU_SUP_AMD[0m || [31mCONFIG_ARM64[0m default m help Provides AMD Secure Processor device driver. If you choose '[31mCONFIG_M[0m' here, this module will be called ccp. config [31mCONFIG_CRYPTO_DEV_SP_CCP[0m bool "Cryptographic Coprocessor device" default y depends on [31mCONFIG_CRYPTO_DEV_CCP_DD[0m select [31mCONFIG_HW_RANDOM[0m select [31mCONFIG_DMA_ENGINE[0m select [31mCONFIG_DMADEVICES[0m select [31mCONFIG_CRYPTO_SHA1[0m select [31mCONFIG_CRYPTO_SHA256[0m help Provides the support for AMD Cryptographic Coprocessor (CCP) device which can be used to offload encryption operations such as SHA, AES and more. config [31mCONFIG_CRYPTO_DEV_CCP_CRYPTO[0m tristate "Encryption and hashing offload support" default m depends on [31mCONFIG_CRYPTO_DEV_CCP_DD[0m depends on [31mCONFIG_CRYPTO_DEV_SP_CCP[0m select [31mCONFIG_CRYPTO_HASH[0m select [31mCONFIG_CRYPTO_BLKCIPHER[0m select [31mCONFIG_CRYPTO_AUTHENC[0m select [31mCONFIG_CRYPTO_RSA[0m select [31mCONFIG_CRYPTO_LIB_AES[0m help Support for using the cryptographic API with the AMD Cryptographic Coprocessor. This module supports offload of SHA and AES algorithms. If you choose '[31mCONFIG_M[0m' here, this module will be called ccp_crypto. config [31mCONFIG_CRYPTO_DEV_SP_PSP[0m bool "Platform Security Processor (PSP) device" default y depends on [31mCONFIG_CRYPTO_DEV_CCP_DD[0m && [31mCONFIG_X86_64[0m help Provide support for the AMD Platform Security Processor (PSP). The PSP is a dedicated processor that provides support for key management commands in Secure Encrypted Virtualization (SEV) mode, along with software-based Trusted Execution Environment ([31mCONFIG_TEE[0m) to enable third-party trusted applications. config [31mCONFIG_CRYPTO_DEV_CCP_DEBUGFS[0m bool "Enable CCP Internals in DebugFS" default n depends on [31mCONFIG_CRYPTO_DEV_SP_CCP[0m help Expose CCP device information such as operation statistics, feature information, and descriptor queue contents. |