Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 4098 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 4088 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 3304 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 4218 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 3886 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h, line 440 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h, line 797 (as a macro)