Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 3569 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 3567 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 2705 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 3729 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 3397 (as a macro)