Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h, line 409 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 4220 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 4210 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 3428 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 4342 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 4040 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h, line 221 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h, line 365 (as a macro)