Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h, line 671 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 4462 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 4594 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 4292 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h, line 671 (as a macro)