Defined in 5 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 980 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 791 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 840 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 973 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 851 (as a macro)

Referenced in 5 files:

• drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
  • line 46
  • line 49
  • line 52
  • line 55
  • line 58
  • line 61
• drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
  • line 91
  • line 94
  • line 97
  • line 100
• drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
  • line 1296
  • line 1368
• drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
  • line 44
  • line 47
  • line 50
  • line 53
  • line 56
  • line 59
• drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
  • line 45
  • line 48
  • line 51
  • line 54
  • line 57
  • line 60