Defined in 3 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 6465 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 9146 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 8116 (as a macro)