Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h, line 525 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h, line 325 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h, line 538 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h, line 450 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h, line 538 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h, line 534 (as a macro)