# SPDX-License-Identifier: GPL-2.0-only menuconfig [31mCONFIG_ARCH_SIRF[0m bool "CSR SiRF" depends on [31mCONFIG_ARCH_MULTI_V7[0m select [31mCONFIG_ARCH_HAS_RESET_CONTROLLER[0m select [31mCONFIG_RESET_CONTROLLER[0m select [31mCONFIG_GENERIC_IRQ_CHIP[0m select [31mCONFIG_GPIOLIB[0m select [31mCONFIG_NO_IOPORT_MAP[0m select [31mCONFIG_REGMAP[0m select [31mCONFIG_PINCTRL[0m select [31mCONFIG_PINCTRL_SIRF[0m help Support for CSR SiRFprimaII/Marco/Polo platforms if [31mCONFIG_ARCH_SIRF[0m comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features" config [31mCONFIG_ARCH_ATLAS6[0m bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" default y select [31mCONFIG_SIRF_IRQ[0m help Support for CSR SiRFSoC [31mCONFIG_ARM[0m Cortex A9 Platform config [31mCONFIG_ARCH_ATLAS7[0m bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" default y select [31mCONFIG_ARM_GIC[0m select [31mCONFIG_ATLAS7_TIMER[0m select [31mCONFIG_HAVE_ARM_SCU[0m if [31mCONFIG_SMP[0m select [31mCONFIG_HAVE_SMP[0m help Support for CSR SiRFSoC [31mCONFIG_ARM[0m Cortex A7 Platform config [31mCONFIG_ARCH_PRIMA2[0m bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" default y select [31mCONFIG_SIRF_IRQ[0m select [31mCONFIG_ZONE_DMA[0m select [31mCONFIG_PRIMA2_TIMER[0m help Support for CSR SiRFSoC [31mCONFIG_ARM[0m Cortex A9 Platform config [31mCONFIG_SIRF_IRQ[0m bool endif |