# SPDX-License-Identifier: GPL-2.0
#
# [31mCONFIG_PCI[0m Express Port Bus Configuration
#
config [31mCONFIG_PCIEPORTBUS[0m
bool "PCI Express Port Bus support"
depends on [31mCONFIG_PCI[0m
help
This enables [31mCONFIG_PCI[0m Express Port Bus support. Users can then enable
support for Native Hot-Plug, Advanced Error Reporting, Power
Management Events, and Downstream Port Containment.
#
# Include service Kconfig here
#
config [31mCONFIG_HOTPLUG_PCI_PCIE[0m
bool "PCI Express Hotplug driver"
depends on [31mCONFIG_HOTPLUG_PCI[0m && [31mCONFIG_PCIEPORTBUS[0m
help
Say Y here if you have a motherboard that supports [31mCONFIG_PCI[0m Express Native
Hotplug
When in doubt, say N.
config [31mCONFIG_PCIEAER[0m
bool "PCI Express Advanced Error Reporting support"
depends on [31mCONFIG_PCIEPORTBUS[0m
select [31mCONFIG_RAS[0m
default y
help
This enables [31mCONFIG_PCI[0m Express Root Port Advanced Error Reporting
(AER) driver support. Error reporting messages sent to Root
Port will be handled by [31mCONFIG_PCI[0m Express AER driver.
config [31mCONFIG_PCIEAER_INJECT[0m
tristate "PCI Express error injection support"
depends on [31mCONFIG_PCIEAER[0m
help
This enables [31mCONFIG_PCI[0m Express Root Port Advanced Error Reporting
(AER) software error injector.
Debugging AER code is quite difficult because it is hard
to trigger various real hardware errors. Software-based
error injection can fake almost all kinds of errors with the
help of a user space helper tool aer-inject, which can be
gotten from:
http://www.kernel.org/pub/linux/utils/pci/aer-inject/
#
# [31mCONFIG_PCI[0m Express ECRC
#
config [31mCONFIG_PCIE_ECRC[0m
bool "PCI Express ECRC settings control"
depends on [31mCONFIG_PCIEAER[0m
help
Used to override firmware/bios settings for [31mCONFIG_PCI[0m Express ECRC
(transaction layer end-to-end CRC checking).
When in doubt, say N.
#
# [31mCONFIG_PCI[0m Express ASPM
#
config [31mCONFIG_PCIEASPM[0m
bool "PCI Express ASPM control" if [31mCONFIG_EXPERT[0m
depends on [31mCONFIG_PCI[0m && [31mCONFIG_PCIEPORTBUS[0m
default y
help
This enables OS control over [31mCONFIG_PCI[0m Express ASPM (Active State
Power Management) and Clock Power Management. ASPM supports
state L0/L0s/L1.
ASPM is initially set up by the firmware. With this option enabled,
Linux can modify this state in order to disable ASPM on known-bad
hardware or configurations and enable it when known-safe.
ASPM can be disabled or enabled at runtime via
/sys/module/pcie_aspm/parameters/policy
When in doubt, say Y.
config [31mCONFIG_PCIEASPM_DEBUG[0m
bool "Debug PCI Express ASPM"
depends on [31mCONFIG_PCIEASPM[0m
help
This enables [31mCONFIG_PCI[0m Express ASPM debug support. It will add per-device
interface to control ASPM.
choice
prompt "Default ASPM policy"
default [31mCONFIG_PCIEASPM_DEFAULT[0m
depends on [31mCONFIG_PCIEASPM[0m
config [31mCONFIG_PCIEASPM_DEFAULT[0m
bool "BIOS default"
depends on [31mCONFIG_PCIEASPM[0m
help
Use the BIOS defaults for [31mCONFIG_PCI[0m Express ASPM.
config [31mCONFIG_PCIEASPM_POWERSAVE[0m
bool "Powersave"
depends on [31mCONFIG_PCIEASPM[0m
help
Enable [31mCONFIG_PCI[0m Express ASPM L0s and L1 where possible, even if the
BIOS did not.
config [31mCONFIG_PCIEASPM_POWER_SUPERSAVE[0m
bool "Power Supersave"
depends on [31mCONFIG_PCIEASPM[0m
help
Same as [31mCONFIG_PCIEASPM_POWERSAVE[0m, except it also enables L1 substates where
possible. This would result in higher power savings while staying in L1
where the components support it.
config [31mCONFIG_PCIEASPM_PERFORMANCE[0m
bool "Performance"
depends on [31mCONFIG_PCIEASPM[0m
help
Disable [31mCONFIG_PCI[0m Express ASPM L0s and L1, even if the BIOS enabled them.
endchoice
config [31mCONFIG_PCIE_PME[0m
def_bool y
depends on [31mCONFIG_PCIEPORTBUS[0m && [31mCONFIG_PM[0m
config [31mCONFIG_PCIE_DPC[0m
bool "PCI Express Downstream Port Containment support"
depends on [31mCONFIG_PCIEPORTBUS[0m && [31mCONFIG_PCIEAER[0m
help
This enables [31mCONFIG_PCI[0m Express Downstream Port Containment (DPC)
driver support. DPC events from Root and Downstream ports
will be handled by the DPC driver. If your system doesn't
have this capability or you do not want to use this feature,
it is safe to answer N.
config [31mCONFIG_PCIE_PTM[0m
bool "PCI Express Precision Time Measurement support"
depends on [31mCONFIG_PCIEPORTBUS[0m
help
This enables [31mCONFIG_PCI[0m Express Precision Time Measurement (PTM)
support.
This is only useful if you have devices that support PTM, but it
is safe to enable even if you don't.
config [31mCONFIG_PCIE_BW[0m
bool "PCI Express Bandwidth Change Notification"
depends on [31mCONFIG_PCIEPORTBUS[0m
help
This enables [31mCONFIG_PCI[0m Express Bandwidth Change Notification. If
you know link width or rate changes occur only to correct
unreliable links, you may answer Y.