Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 2608 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 2618 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 2852 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 4038 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 4826 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 1840 (as a macro)