Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 5059 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 5138 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 6380 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 8162 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 4378 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 6117 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 8698 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 7668 (as a macro)