Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 42 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 53 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 108 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 234 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 944 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 853 (as a macro)

Referenced in 6 files:

• drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c, line 259
• drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c, line 585
• drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
  • line 660
  • line 671
  • line 805
  • line 813
• drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
  • line 301
  • line 308
  • line 368
  • line 378
• drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
  • line 370
  • line 377
  • line 417
  • line 426
  • line 435
• drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
  • line 387
  • line 394