* Samsung Multi Format Codec (MFC)

Multi Format Codec (MFC) is the IP present in Samsung SoCs which
supports high resolution decoding and encoding functionalities.
The MFC device driver is a v4l2 driver which can encode/decode
video raw/elementary streams and has support for all popular
video codecs.

Required properties:
  - compatible : value should be either one among the following
	(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
	(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
	(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
	(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
	(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
	(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC

  - reg : Physical base address of the IP registers and length of memory
	  mapped region.

  - interrupts : MFC interrupt number to the CPU.
  - clocks : from common clock binding: handle to mfc clock.
  - clock-names : from common clock binding: must contain "mfc",
		  corresponding to entry in the clocks property.

Optional properties:
  - power-domains : power-domain property defined with a phandle
			   to respective power domain.
  - memory-region : from reserved memory binding: phandles to two reserved
	memory regions, first is for "left" mfc memory bus interfaces,
	second if for the "right" mfc memory bus, used when no SYSMMU
	support is available; used only by MFC v5 present in Exynos4 SoCs

Obsolete properties:
  - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region
	property instead


Example:
SoC specific DT entry:

mfc: codec@13400000 {
	compatible = "samsung,mfc-v5";
	reg = <0x13400000 0x10000>;
	interrupts = <0 94 0>;
	power-domains = <&pd_mfc>;
	clocks = <&clock 273>;
	clock-names = "mfc";
};

Reserved memory specific DT entry for given board (see reserved memory binding
for more information):

reserved-memory {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	mfc_left: region@51000000 {
		compatible = "shared-dma-pool";
		no-map;
		reg = <0x51000000 0x800000>;
	};

	mfc_right: region@43000000 {
		compatible = "shared-dma-pool";
		no-map;
		reg = <0x43000000 0x800000>;
	};
};

Board specific DT entry:

codec@13400000 {
	memory-region = <&mfc_left>, <&mfc_right>;
};