# SPDX-License-Identifier: GPL-2.0 # # Hisilicon Clock specific Makefile # obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o obj-$([31mCONFIG_ARCH_HI3xxx[0m) += clk-hi3620.o obj-$([31mCONFIG_ARCH_HIP04[0m) += clk-hip04.o obj-$([31mCONFIG_ARCH_HIX5HD2[0m) += clk-hix5hd2.o obj-$([31mCONFIG_COMMON_CLK_HI3516CV300[0m) += crg-hi3516cv300.o obj-$([31mCONFIG_COMMON_CLK_HI3519[0m) += clk-hi3519.o obj-$([31mCONFIG_COMMON_CLK_HI3660[0m) += clk-hi3660.o obj-$([31mCONFIG_COMMON_CLK_HI3670[0m) += clk-hi3670.o obj-$([31mCONFIG_COMMON_CLK_HI3798CV200[0m) += crg-hi3798cv200.o obj-$([31mCONFIG_COMMON_CLK_HI6220[0m) += clk-hi6220.o obj-$([31mCONFIG_RESET_HISI[0m) += reset.o obj-$([31mCONFIG_STUB_CLK_HI6220[0m) += clk-hi6220-stub.o obj-$([31mCONFIG_STUB_CLK_HI3660[0m) += clk-hi3660-stub.o |