# SPDX-License-Identifier: GPL-2.0 # # Makefile for Mellanox 5th generation network adapters # (ConnectX series) core & netdev driver # subdir-ccflags-y += -I$(src) obj-$([31mCONFIG_MLX5_CORE[0m) += mlx5_core.o # # mlx5 core basic # mlx5_core-y := main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \ health.o mcg.o cq.o alloc.o qp.o port.o mr.o pd.o \ transobj.o vport.o sriov.o fs_cmd.o fs_core.o pci_irq.o \ fs_counters.o rl.o lag.o dev.o events.o wq.o lib/gid.o \ lib/devcom.o lib/pci_vsc.o lib/dm.o diag/fs_tracepoint.o \ diag/fw_tracer.o diag/crdump.o devlink.o # # Netdev basic # mlx5_core-$([31mCONFIG_MLX5_CORE_EN[0m) += en_main.o en_common.o en_fs.o en_ethtool.o \ en_tx.o en_rx.o en_dim.o en_txrx.o en/xdp.o en_stats.o \ en_selftest.o en/port.o en/monitor_stats.o en/health.o \ en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/umem.o \ en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o # # Netdev extra # mlx5_core-$([31mCONFIG_MLX5_EN_ARFS[0m) += en_arfs.o mlx5_core-$([31mCONFIG_MLX5_EN_RXNFC[0m) += en_fs_ethtool.o mlx5_core-$([31mCONFIG_MLX5_CORE_EN_DCB[0m) += en_dcbnl.o en/port_buffer.o mlx5_core-$([31mCONFIG_MLX5_ESWITCH[0m) += en_rep.o en_tc.o en/tc_tun.o lib/port_tun.o lag_mp.o \ lib/geneve.o en/tc_tun_vxlan.o en/tc_tun_gre.o \ en/tc_tun_geneve.o diag/en_tc_tracepoint.o mlx5_core-$([31mCONFIG_PCI_HYPERV_INTERFACE[0m) += en/hv_vhca_stats.o # # Core extra # mlx5_core-$([31mCONFIG_MLX5_ESWITCH[0m) += eswitch.o eswitch_offloads.o eswitch_offloads_termtbl.o \ ecpf.o rdma.o mlx5_core-$([31mCONFIG_MLX5_MPFS[0m) += lib/mpfs.o mlx5_core-$([31mCONFIG_VXLAN[0m) += lib/vxlan.o mlx5_core-$([31mCONFIG_PTP_1588_CLOCK[0m) += lib/clock.o mlx5_core-$([31mCONFIG_PCI_HYPERV_INTERFACE[0m) += lib/hv.o lib/hv_vhca.o # # Ipoib netdev # mlx5_core-$([31mCONFIG_MLX5_CORE_IPOIB[0m) += ipoib/ipoib.o ipoib/ethtool.o ipoib/ipoib_vlan.o # # Accelerations & FPGA # mlx5_core-$([31mCONFIG_MLX5_FPGA_IPSEC[0m) += fpga/ipsec.o mlx5_core-$([31mCONFIG_MLX5_FPGA_TLS[0m) += fpga/tls.o mlx5_core-$([31mCONFIG_MLX5_ACCEL[0m) += lib/crypto.o accel/tls.o accel/ipsec.o mlx5_core-$([31mCONFIG_MLX5_FPGA[0m) += fpga/cmd.o fpga/core.o fpga/conn.o fpga/sdk.o mlx5_core-$([31mCONFIG_MLX5_EN_IPSEC[0m) += en_accel/ipsec.o en_accel/ipsec_rxtx.o \ en_accel/ipsec_stats.o mlx5_core-$([31mCONFIG_MLX5_EN_TLS[0m) += en_accel/tls.o en_accel/tls_rxtx.o en_accel/tls_stats.o \ en_accel/ktls.o en_accel/ktls_tx.o mlx5_core-$([31mCONFIG_MLX5_SW_STEERING[0m) += steering/dr_domain.o steering/dr_table.o \ steering/dr_matcher.o steering/dr_rule.o \ steering/dr_icm_pool.o steering/dr_crc32.o \ steering/dr_ste.o steering/dr_send.o \ steering/dr_cmd.o steering/dr_fw.o \ steering/dr_action.o steering/fs_dr.o |