# SPDX-License-Identifier: GPL-2.0-only
menu "IRQ subsystem"
# Options selectable by the architecture code
# Make sparse irq Kconfig switch below available
config [31mCONFIG_MAY_HAVE_SPARSE_IRQ[0m
bool
# Legacy support, required for itanic
config [31mCONFIG_GENERIC_IRQ_LEGACY[0m
bool
# Enable the generic irq autoprobe mechanism
config [31mCONFIG_GENERIC_IRQ_PROBE[0m
bool
# Use the generic /proc/interrupts implementation
config [31mCONFIG_GENERIC_IRQ_SHOW[0m
bool
# Print level/edge extra information
config [31mCONFIG_GENERIC_IRQ_SHOW_LEVEL[0m
bool
# Supports effective affinity mask
config [31mCONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK[0m
bool
# Facility to allocate a hardware interrupt. This is legacy support
# and should not be used in new code. Use irq domains instead.
config [31mCONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ[0m
bool
# Support for delayed migration from interrupt context
config [31mCONFIG_GENERIC_PENDING_IRQ[0m
bool
# Support for generic irq migrating off cpu before the cpu is offline.
config [31mCONFIG_GENERIC_IRQ_MIGRATION[0m
bool
# Alpha specific irq affinity mechanism
config [31mCONFIG_AUTO_IRQ_AFFINITY[0m
bool
# Tasklet based software resend for pending interrupts on enable_irq()
config [31mCONFIG_HARDIRQS_SW_RESEND[0m
bool
# Preflow handler support for fasteoi (sparc64)
config [31mCONFIG_IRQ_PREFLOW_FASTEOI[0m
bool
# Edge style eoi based handler (cell)
config [31mCONFIG_IRQ_EDGE_EOI_HANDLER[0m
bool
# Generic configurable interrupt chip implementation
config [31mCONFIG_GENERIC_IRQ_CHIP[0m
bool
select [31mCONFIG_IRQ_DOMAIN[0m
# Generic irq_domain hw <--> linux irq number translation
config [31mCONFIG_IRQ_DOMAIN[0m
bool
# Support for simulated interrupts
config [31mCONFIG_IRQ_SIM[0m
bool
select [31mCONFIG_IRQ_WORK[0m
# Support for hierarchical irq domains
config [31mCONFIG_IRQ_DOMAIN_HIERARCHY[0m
bool
select [31mCONFIG_IRQ_DOMAIN[0m
# Support for hierarchical fasteoi+edge and fasteoi+level handlers
config [31mCONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS[0m
bool
# Generic IRQ IPI support
config [31mCONFIG_GENERIC_IRQ_IPI[0m
bool
# Generic MSI interrupt support
config [31mCONFIG_GENERIC_MSI_IRQ[0m
bool
# Generic MSI hierarchical interrupt domain support
config [31mCONFIG_GENERIC_MSI_IRQ_DOMAIN[0m
bool
select [31mCONFIG_IRQ_DOMAIN_HIERARCHY[0m
select [31mCONFIG_GENERIC_MSI_IRQ[0m
config [31mCONFIG_IRQ_MSI_IOMMU[0m
bool
config [31mCONFIG_HANDLE_DOMAIN_IRQ[0m
bool
config [31mCONFIG_IRQ_TIMINGS[0m
bool
config [31mCONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR[0m
bool
config [31mCONFIG_GENERIC_IRQ_RESERVATION_MODE[0m
bool
# Support forced irq threading
config [31mCONFIG_IRQ_FORCED_THREADING[0m
bool
config [31mCONFIG_SPARSE_IRQ[0m
bool "Support sparse irq numbering" if [31mCONFIG_MAY_HAVE_SPARSE_IRQ[0m
---help---
Sparse irq numbering is useful for distro kernels that want
to define a high CONFIG_NR_CPUS value but still want to have
low kernel memory footprint on smaller machines.
( Sparse irqs can also be beneficial on [31mCONFIG_NUMA[0m boxes, as they spread
out the interrupt descriptors in a more [31mCONFIG_NUMA[0m-friendly way. )
If you don't know what to do here, say N.
config [31mCONFIG_GENERIC_IRQ_DEBUGFS[0m
bool "Expose irq internals in debugfs"
depends on [31mCONFIG_DEBUG_FS[0m
default n
---help---
Exposes internal state information through debugfs. Mostly for
developers and debugging of hard to diagnose interrupt problems.
If you don't know what to do here, say N.
endmenu
config [31mCONFIG_GENERIC_IRQ_MULTI_HANDLER[0m
bool
help
Allow to specify the low level IRQ handler at run time.