Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 4072 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 4062 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 3278 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 4192 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 3860 (as a macro)