Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 1555 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 1459 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 1587 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 2692 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h, line 2056 (as a macro)