Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h, line 9365 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h, line 9065 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h, line 10321 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h, line 3192 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h, line 6871 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h, line 9835 (as a macro)