Defined in 9 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 6639 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 6801 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 8146 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 18071 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 341 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 5405 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 13041 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 16461 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 12788 (as a macro)