Defined in 3 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 4179 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 5031 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 4093 (as a macro)