Defined in 9 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 4126 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 4031 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 5262 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 11006 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 2741 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 3347 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 9235 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 11876 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 10782 (as a macro)