// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "jz4780.dtsi"
#include <dt-bindings/clock/ingenic,tcu.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "img,ci20", "ingenic,jz4780";

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		serial3 = &uart3;
		serial4 = &uart4;
	};

	chosen {
		stdout-path = &uart4;
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x10000000
		       0x30000000 0x30000000>;
	};

	eth0_power: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "eth0_power";
		gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
		enable-active-high;
	};
};

&ext {
	clock-frequency = <48000000>;
};

&mmc0 {
	status = "okay";

	bus-width = <4>;
	max-frequency = <50000000>;

	pinctrl-names = "default";
	pinctrl-0 = <&pins_mmc0>;

	cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
};

&mmc1 {
	status = "okay";

	bus-width = <4>;
	max-frequency = <50000000>;

	pinctrl-names = "default";
	pinctrl-0 = <&pins_mmc1>;
};

&uart0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_uart0>;
};

&uart1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_uart1>;
};

&uart3 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_uart3>;
};

&uart4 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_uart4>;
};

&nemc {
	status = "okay";

	nandc: nand-controller@1 {
		compatible = "ingenic,jz4780-nand";
		reg = <1 0 0x1000000>;

		#address-cells = <1>;
		#size-cells = <0>;

		ingenic,bch-controller = <&bch>;

		ingenic,nemc-tAS = <10>;
		ingenic,nemc-tAH = <5>;
		ingenic,nemc-tBP = <10>;
		ingenic,nemc-tAW = <15>;
		ingenic,nemc-tSTRV = <100>;

		/*
		 * Only CLE/ALE are needed for the devices that are connected, rather
		 * than the full address line set.
		 */
		pinctrl-names = "default";
		pinctrl-0 = <&pins_nemc>;

		nand@1 {
			reg = <1>;

			nand-ecc-step-size = <1024>;
			nand-ecc-strength = <24>;
			nand-ecc-mode = "hw";
			nand-on-flash-bbt;

			pinctrl-names = "default";
			pinctrl-0 = <&pins_nemc_cs1>;

			partitions {
				compatible = "fixed-partitions";
				#address-cells = <2>;
				#size-cells = <2>;

				partition@0 {
					label = "u-boot-spl";
					reg = <0x0 0x0 0x0 0x800000>;
				};

				partition@800000 {
					label = "u-boot";
					reg = <0x0 0x800000 0x0 0x200000>;
				};

				partition@a00000 {
					label = "u-boot-env";
					reg = <0x0 0xa00000 0x0 0x200000>;
				};

				partition@c00000 {
					label = "boot";
					reg = <0x0 0xc00000 0x0 0x4000000>;
				};

				partition@4c00000 {
					label = "system";
					reg = <0x0 0x4c00000 0x1 0xfb400000>;
				};
			};
		};
	};

	dm9000@6 {
		compatible = "davicom,dm9000";
		davicom,no-eeprom;

		pinctrl-names = "default";
		pinctrl-0 = <&pins_nemc_cs6>;

		reg = <6 0 1   /* addr */
		       6 2 1>; /* data */

		ingenic,nemc-tAS = <15>;
		ingenic,nemc-tAH = <10>;
		ingenic,nemc-tBP = <20>;
		ingenic,nemc-tAW = <50>;
		ingenic,nemc-tSTRV = <100>;

		reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
		vcc-supply = <&eth0_power>;

		interrupt-parent = <&gpe>;
		interrupts = <19 4>;
	};
};

&bch {
	status = "okay";
};

&pinctrl {
	pins_uart0: uart0 {
		function = "uart0";
		groups = "uart0-data";
		bias-disable;
	};

	pins_uart1: uart1 {
		function = "uart1";
		groups = "uart1-data";
		bias-disable;
	};

	pins_uart3: uart3 {
		function = "uart3";
		groups = "uart3-data", "uart3-hwflow";
		bias-disable;
	};

	pins_uart4: uart4 {
		function = "uart4";
		groups = "uart4-data";
		bias-disable;
	};

	pins_nemc: nemc {
		function = "nemc";
		groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
		bias-disable;
	};

	pins_nemc_cs1: nemc-cs1 {
		function = "nemc-cs1";
		groups = "nemc-cs1";
		bias-disable;
	};

	pins_nemc_cs6: nemc-cs6 {
		function = "nemc-cs6";
		groups = "nemc-cs6";
		bias-disable;
	};

	pins_mmc0: mmc0 {
		function = "mmc0";
		groups = "mmc0-1bit-e", "mmc0-4bit-e";
		bias-disable;
	};

	pins_mmc1: mmc1 {
		function = "mmc1";
		groups = "mmc1-1bit-d", "mmc1-4bit-d";
		bias-disable;
	};
};

&tcu {
	/* 3 MHz for the system timer and clocksource */
	assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
	assigned-clock-rates = <3000000>, <3000000>;
};