# SPDX-License-Identifier: GPL-2.0 ccflags-$([31mCONFIG_PPC64[0m) := $(NO_MINIMAL_TOC) mpic-msi-obj-$([31mCONFIG_PCI_MSI[0m) += mpic_msi.o mpic_u3msi.o obj-$([31mCONFIG_MPIC[0m) += mpic.o $(mpic-msi-obj-y) obj-$([31mCONFIG_MPIC_TIMER[0m) += mpic_timer.o obj-$([31mCONFIG_FSL_MPIC_TIMER_WAKEUP[0m) += fsl_mpic_timer_wakeup.o mpic-msgr-obj-$([31mCONFIG_MPIC_MSGR[0m) += mpic_msgr.o obj-$([31mCONFIG_MPIC[0m) += mpic.o $(mpic-msi-obj-y) $(mpic-msgr-obj-y) obj-$([31mCONFIG_PPC_EPAPR_HV_PIC[0m) += ehv_pic.o fsl-msi-obj-$([31mCONFIG_PCI_MSI[0m) += fsl_msi.o obj-$([31mCONFIG_PPC_MSI_BITMAP[0m) += msi_bitmap.o obj-$([31mCONFIG_PPC_MPC106[0m) += grackle.o obj-$([31mCONFIG_PPC_DCR_NATIVE[0m) += dcr-low.o obj-$([31mCONFIG_PPC_PMI[0m) += pmi.o obj-$([31mCONFIG_U3_DART[0m) += dart_iommu.o obj-$([31mCONFIG_MMIO_NVRAM[0m) += mmio_nvram.o obj-$([31mCONFIG_FSL_SOC[0m) += fsl_soc.o fsl_mpic_err.o obj-$([31mCONFIG_FSL_PCI[0m) += fsl_pci.o $(fsl-msi-obj-y) obj-$([31mCONFIG_FSL_PMC[0m) += fsl_pmc.o obj-$([31mCONFIG_FSL_CORENET_RCPM[0m) += fsl_rcpm.o obj-$([31mCONFIG_FSL_LBC[0m) += fsl_lbc.o obj-$([31mCONFIG_FSL_GTM[0m) += fsl_gtm.o obj-$([31mCONFIG_FSL_85XX_CACHE_SRAM[0m) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o obj-$([31mCONFIG_SIMPLE_GPIO[0m) += simple_gpio.o obj-$([31mCONFIG_FSL_RIO[0m) += fsl_rio.o fsl_rmu.o obj-$([31mCONFIG_TSI108_BRIDGE[0m) += tsi108_pci.o tsi108_dev.o obj-$([31mCONFIG_RTC_DRV_CMOS[0m) += rtc_cmos_setup.o obj-$([31mCONFIG_PPC_INDIRECT_PCI[0m) += indirect_pci.o obj-$([31mCONFIG_PPC_I8259[0m) += i8259.o obj-$([31mCONFIG_IPIC[0m) += ipic.o obj-$([31mCONFIG_XILINX_VIRTEX[0m) += xilinx_intc.o obj-$([31mCONFIG_XILINX_PCI[0m) += xilinx_pci.o obj-$([31mCONFIG_OF_RTC[0m) += of_rtc.o obj-$([31mCONFIG_CPM[0m) += cpm_common.o obj-$([31mCONFIG_CPM2[0m) += cpm2.o cpm2_pic.o cpm_gpio.o obj-$([31mCONFIG_8xx_GPIO[0m) += cpm_gpio.o obj-$([31mCONFIG_QUICC_ENGINE[0m) += cpm_common.o obj-$([31mCONFIG_PPC_DCR[0m) += dcr.o obj-$([31mCONFIG_PPC_MPC512x[0m) += mpc5xxx_clocks.o obj-$([31mCONFIG_PPC_MPC52xx[0m) += mpc5xxx_clocks.o ifdef [31mCONFIG_SUSPEND[0m obj-$([31mCONFIG_PPC_BOOK3S_32[0m) += 6xx-suspend.o endif obj-$([31mCONFIG_PPC_EARLY_DEBUG_MEMCONS[0m) += udbg_memcons.o obj-$([31mCONFIG_PPC_XICS[0m) += xics/ obj-$([31mCONFIG_PPC_XIVE[0m) += xive/ obj-$([31mCONFIG_GE_FPGA[0m) += ge/ |