/* SPDX-License-Identifier: GPL-2.0 */ #ifndef LINUX_SSB_MIPSCORE_H_ #define LINUX_SSB_MIPSCORE_H_ #ifdef [31mCONFIG_SSB_DRIVER_MIPS[0m struct ssb_device; struct ssb_serial_port { void *regs; unsigned long clockspeed; unsigned int irq; unsigned int baud_base; unsigned int reg_shift; }; struct ssb_pflash { bool present; u8 buswidth; u32 window; u32 window_size; }; #ifdef [31mCONFIG_SSB_SFLASH[0m struct ssb_sflash { bool present; u32 window; u32 blocksize; u16 numblocks; u32 size; void *priv; }; #endif struct ssb_mipscore { struct ssb_device *dev; int nr_serial_ports; struct ssb_serial_port serial_ports[4]; struct ssb_pflash pflash; #ifdef [31mCONFIG_SSB_SFLASH[0m struct ssb_sflash sflash; #endif }; extern void ssb_mipscore_init(struct ssb_mipscore *mcore); extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore); extern unsigned int ssb_mips_irq(struct ssb_device *dev); #else /* CONFIG_SSB_DRIVER_MIPS */ struct ssb_mipscore { }; static inline void ssb_mipscore_init(struct ssb_mipscore *mcore) { } static inline unsigned int ssb_mips_irq(struct ssb_device *dev) { return 0; } #endif /* CONFIG_SSB_DRIVER_MIPS */ #endif /* LINUX_SSB_MIPSCORE_H_ */ |