Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h, line 405 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h, line 4224 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h, line 4214 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h, line 3432 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h, line 4346 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h, line 4044 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h, line 223 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h, line 367 (as a macro)