Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h, line 171 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h, line 180 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h, line 915 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h, line 528 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h, line 2552 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h, line 4434 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h, line 2856 (as a macro)