Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 981 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 792 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 841 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 4260 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 509 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 852 (as a macro)

Referenced in 5 files:

• drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c, line 46
• drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c, line 91
• drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c, line 44
• drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
  • line 55
  • line 55
  • line 58
  • line 61
  • line 64
  • line 67
  • line 70
• drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c, line 45