Defined in 9 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 4644 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 4677 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 5909 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 10260 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 3151 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 4012 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 8409 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 11002 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 9908 (as a macro)