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Elixir Cross Referencer

* Clock bindings for Freescale i.MX6 SLL

Required properties:
- compatible: Should be "fsl,imx6sll-ccm"
- reg: Address and length of the register set
- #clock-cells: Should be <1>
- clocks: list of clock specifiers, must contain an entry for each required
  entry in clock-names
- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1"

The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6sll-clock.h
for the full list of i.MX6 SLL clock IDs.

Examples:

#include <dt-bindings/clock/imx6sll-clock.h>

clks: clock-controller@20c4000 {
		compatible = "fsl,imx6sll-ccm";
		reg = <0x020c4000 0x4000>;
		interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
		#clock-cells = <1>;
		clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
		clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
};

uart1: serial@2020000 {
		compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
		reg = <0x02020000 0x4000>;
		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clks IMX6SLL_CLK_UART1_IPG>,
			 <&clks IMX6SLL_CLK_UART1_SERIAL>;
		clock-names = "ipg", "per";
};