# SPDX-License-Identifier: GPL-2.0-only config [31mCONFIG_SH_INTC[0m bool select [31mCONFIG_IRQ_DOMAIN[0m if [31mCONFIG_SH_INTC[0m comment "Interrupt controller options" config [31mCONFIG_INTC_USERIMASK[0m bool "Userspace interrupt masking support" depends on ([31mCONFIG_SUPERH[0m && [31mCONFIG_CPU_SH4A[0m) || [31mCONFIG_COMPILE_TEST[0m help This enables support for hardware-assisted userspace hardirq masking. SH-4A and newer interrupt blocks all support a special shadowed page with all non-masking registers obscured when mapped in to userspace. This is primarily for use by userspace device drivers that are using special priority levels. If in doubt, say N. config [31mCONFIG_INTC_BALANCING[0m bool "Hardware IRQ balancing support" depends on [31mCONFIG_SMP[0m && [31mCONFIG_SUPERH[0m && [31mCONFIG_CPU_SHX3[0m help This enables support for IRQ auto-distribution mode on SH-X3 [31mCONFIG_SMP[0m parts. All of the balancing and CPU wakeup decisions are taken care of automatically by hardware for distributed vectors. If in doubt, say N. config [31mCONFIG_INTC_MAPPING_DEBUG[0m bool "Expose IRQ to per-controller id mapping via debugfs" depends on [31mCONFIG_DEBUG_FS[0m help This will create a debugfs entry for showing the relationship between system IRQs and the per-controller id tables. If in doubt, say N. endif |