Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 983 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 794 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 843 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 5816 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 663 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 854 (as a macro)

Referenced in 5 files:

• drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c, line 52
• drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c, line 97
• drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c, line 50
• drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c, line 61
• drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c, line 51