Defined in 3 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 1312 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 1390 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 1074 (as a macro)

Referenced in 3 files:

• drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c, line 147
• drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c, line 76
• drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c, line 112