SiFive FU540 PRCI bindings On the FU540 family of SoCs, most system-wide clock and reset integration is via the PRCI IP block. Required properties: - compatible: Should be "sifive,<chip>-prci". Only one value is supported: "sifive,fu540-c000-prci" - reg: Should describe the PRCI's register target physical address region - clocks: Should point to the hfclk device tree node and the rtcclk device tree node. The RTC clock here is not a time-of-day clock, but is instead a high-stability clock source for system timers and cycle counters. - #clock-cells: Should be <1> The clock consumer should specify the desired clock via the clock ID macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. These macros begin with PRCI_CLK_. The hfclk and rtcclk nodes are required, and represent physical crystals or resonators located on the PCB. These nodes should be present underneath /, rather than /soc. Examples: /* under /, in PCB-specific DT data */ hfclk: hfclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <33333333>; clock-output-names = "hfclk"; }; rtcclk: rtcclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <1000000>; clock-output-names = "rtcclk"; }; /* under /soc, in SoC-specific DT data */ prci: clock-controller@10000000 { compatible = "sifive,fu540-c000-prci"; reg = <0x0 0x10000000 0x0 0x1000>; clocks = <&hfclk>, <&rtcclk>; #clock-cells = <1>; }; |