1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 | // SPDX-License-Identifier: GPL-2.0-or-later /* NetWinder Floating Point Emulator (c) Rebel.COM, 1998,1999 (c) Philip Blundell, 2001 Direct questions, comments to Scott Bambrough <scottb@netwinder.org> */ #include "fpa11.h" #include "fpopcode.h" #include "fpmodule.h" #include "fpmodule.inl" #include <linux/compiler.h> #include <linux/string.h> /* Reset the FPA11 chip. Called to initialize and reset the emulator. */ static void resetFPA11(void) { int i; FPA11 *fpa11 = GET_FPA11(); /* initialize the register type array */ for (i = 0; i <= 7; i++) { fpa11->fType[i] = typeNone; } /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */ fpa11->fpsr = FP_EMULATOR | BIT_AC; } int8 SetRoundingMode(const unsigned int opcode) { switch (opcode & MASK_ROUNDING_MODE) { default: case ROUND_TO_NEAREST: return float_round_nearest_even; case ROUND_TO_PLUS_INFINITY: return float_round_up; case ROUND_TO_MINUS_INFINITY: return float_round_down; case ROUND_TO_ZERO: return float_round_to_zero; } } int8 SetRoundingPrecision(const unsigned int opcode) { #ifdef [31mCONFIG_FPE_NWFPE_XP[0m switch (opcode & MASK_ROUNDING_PRECISION) { case ROUND_SINGLE: return 32; case ROUND_DOUBLE: return 64; case ROUND_EXTENDED: return 80; default: return 80; } #endif return 80; } void nwfpe_init_fpa(union fp_state *fp) { FPA11 *fpa11 = (FPA11 *)fp; #ifdef NWFPE_DEBUG printk("NWFPE: setting up state.\n"); #endif memset(fpa11, 0, sizeof(FPA11)); resetFPA11(); fpa11->initflag = 1; } /* Emulate the instruction in the opcode. */ unsigned int EmulateAll(unsigned int opcode) { unsigned int code; #ifdef NWFPE_DEBUG printk("NWFPE: emulating opcode %08x\n", opcode); #endif code = opcode & 0x00000f00; if (code == 0x00000100 || code == 0x00000200) { /* For coprocessor 1 or 2 (FPA11) */ code = opcode & 0x0e000000; if (code == 0x0e000000) { if (opcode & 0x00000010) { /* Emulate conversion opcodes. */ /* Emulate register transfer opcodes. */ /* Emulate comparison opcodes. */ return EmulateCPRT(opcode); } else { /* Emulate monadic arithmetic opcodes. */ /* Emulate dyadic arithmetic opcodes. */ return EmulateCPDO(opcode); } } else if (code == 0x0c000000) { /* Emulate load/store opcodes. */ /* Emulate load/store multiple opcodes. */ return EmulateCPDT(opcode); } } /* Invalid instruction detected. Return FALSE. */ return 0; } |