# SPDX-License-Identifier: GPL-2.0
config [31mCONFIG_SUPERH[0m
def_bool y
select [31mCONFIG_ARCH_HAS_BINFMT_FLAT[0m if ![31mCONFIG_MMU[0m
select [31mCONFIG_ARCH_HAS_PTE_SPECIAL[0m
select [31mCONFIG_ARCH_HAS_TICK_BROADCAST[0m if [31mCONFIG_GENERIC_CLOCKEVENTS_BROADCAST[0m
select [31mCONFIG_ARCH_MIGHT_HAVE_PC_PARPORT[0m
select [31mCONFIG_HAVE_PATA_PLATFORM[0m
select [31mCONFIG_CLKDEV_LOOKUP[0m
select [31mCONFIG_DMA_DECLARE_COHERENT[0m
select [31mCONFIG_HAVE_IDE[0m if [31mCONFIG_HAS_IOPORT_MAP[0m
select [31mCONFIG_HAVE_MEMBLOCK_NODE_MAP[0m
select [31mCONFIG_HAVE_OPROFILE[0m
select [31mCONFIG_HAVE_ARCH_TRACEHOOK[0m
select [31mCONFIG_HAVE_PERF_EVENTS[0m
select [31mCONFIG_HAVE_DEBUG_BUGVERBOSE[0m
select [31mCONFIG_HAVE_FAST_GUP[0m if [31mCONFIG_MMU[0m
select [31mCONFIG_ARCH_HAVE_CUSTOM_GPIO_H[0m
select [31mCONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG[0m if ([31mCONFIG_GUSA_RB[0m || [31mCONFIG_CPU_SH4A[0m)
select [31mCONFIG_ARCH_HAS_GCOV_PROFILE_ALL[0m
select [31mCONFIG_PERF_USE_VMALLOC[0m
select [31mCONFIG_HAVE_DEBUG_KMEMLEAK[0m
select [31mCONFIG_HAVE_KERNEL_GZIP[0m
select [31mCONFIG_CPU_NO_EFFICIENT_FFS[0m
select [31mCONFIG_HAVE_KERNEL_BZIP2[0m
select [31mCONFIG_HAVE_KERNEL_LZMA[0m
select [31mCONFIG_HAVE_KERNEL_XZ[0m
select [31mCONFIG_HAVE_KERNEL_LZO[0m
select [31mCONFIG_HAVE_UID16[0m
select [31mCONFIG_ARCH_WANT_IPC_PARSE_VERSION[0m
select [31mCONFIG_HAVE_SYSCALL_TRACEPOINTS[0m
select [31mCONFIG_HAVE_REGS_AND_STACK_ACCESS_API[0m
select [31mCONFIG_MAY_HAVE_SPARSE_IRQ[0m
select [31mCONFIG_IRQ_FORCED_THREADING[0m
select [31mCONFIG_RTC_LIB[0m
select [31mCONFIG_GENERIC_ATOMIC64[0m
select [31mCONFIG_GENERIC_IRQ_SHOW[0m
select [31mCONFIG_GENERIC_SMP_IDLE_THREAD[0m
select [31mCONFIG_GENERIC_IDLE_POLL_SETUP[0m
select [31mCONFIG_GENERIC_CLOCKEVENTS[0m
select [31mCONFIG_GENERIC_CMOS_UPDATE[0m if [31mCONFIG_SH_SH03[0m || [31mCONFIG_SH_DREAMCAST[0m
select [31mCONFIG_GENERIC_PCI_IOMAP[0m if [31mCONFIG_PCI[0m
select [31mCONFIG_GENERIC_SCHED_CLOCK[0m
select [31mCONFIG_GENERIC_STRNCPY_FROM_USER[0m
select [31mCONFIG_GENERIC_STRNLEN_USER[0m
select [31mCONFIG_HAVE_MOD_ARCH_SPECIFIC[0m if [31mCONFIG_DWARF_UNWINDER[0m
select [31mCONFIG_MODULES_USE_ELF_RELA[0m
select [31mCONFIG_NO_GENERIC_PCI_IOPORT_MAP[0m if [31mCONFIG_PCI[0m
select [31mCONFIG_OLD_SIGSUSPEND[0m
select [31mCONFIG_OLD_SIGACTION[0m
select [31mCONFIG_PCI_DOMAINS[0m if [31mCONFIG_PCI[0m
select [31mCONFIG_HAVE_ARCH_AUDITSYSCALL[0m
select [31mCONFIG_HAVE_FUTEX_CMPXCHG[0m if [31mCONFIG_FUTEX[0m
select [31mCONFIG_HAVE_NMI[0m
select [31mCONFIG_NEED_SG_DMA_LENGTH[0m
select [31mCONFIG_ARCH_HAS_GIGANTIC_PAGE[0m
help
The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast
gaming console. The SuperH port has a home page at
<http://www.linux-sh.org/>.
config [31mCONFIG_SUPERH32[0m
def_bool "$(ARCH)" = "sh"
select [31mCONFIG_ARCH_32BIT_OFF_T[0m
select [31mCONFIG_GUP_GET_PTE_LOW_HIGH[0m if [31mCONFIG_X2TLB[0m
select [31mCONFIG_HAVE_KPROBES[0m
select [31mCONFIG_HAVE_KRETPROBES[0m
select [31mCONFIG_HAVE_IOREMAP_PROT[0m if [31mCONFIG_MMU[0m && ![31mCONFIG_X2TLB[0m
select [31mCONFIG_HAVE_FUNCTION_TRACER[0m
select [31mCONFIG_HAVE_FTRACE_MCOUNT_RECORD[0m
select [31mCONFIG_HAVE_DYNAMIC_FTRACE[0m
select [31mCONFIG_HAVE_FTRACE_NMI_ENTER[0m if [31mCONFIG_DYNAMIC_FTRACE[0m
select [31mCONFIG_ARCH_WANT_IPC_PARSE_VERSION[0m
select [31mCONFIG_HAVE_FUNCTION_GRAPH_TRACER[0m
select [31mCONFIG_HAVE_ARCH_KGDB[0m
select [31mCONFIG_HAVE_HW_BREAKPOINT[0m
select [31mCONFIG_HAVE_MIXED_BREAKPOINTS_REGS[0m
select [31mCONFIG_PERF_EVENTS[0m
select [31mCONFIG_ARCH_HIBERNATION_POSSIBLE[0m if [31mCONFIG_MMU[0m
select [31mCONFIG_SPARSE_IRQ[0m
select [31mCONFIG_HAVE_STACKPROTECTOR[0m
config [31mCONFIG_SUPERH64[0m
def_bool "$(ARCH)" = "sh64"
select [31mCONFIG_HAVE_EXIT_THREAD[0m
select [31mCONFIG_KALLSYMS[0m
config [31mCONFIG_ARCH_DEFCONFIG[0m
string
default "arch/sh/configs/shx3_defconfig" if [31mCONFIG_SUPERH32[0m
default "arch/sh/configs/cayman_defconfig" if [31mCONFIG_SUPERH64[0m
config [31mCONFIG_GENERIC_BUG[0m
def_bool y
depends on [31mCONFIG_BUG[0m && [31mCONFIG_SUPERH32[0m
config [31mCONFIG_GENERIC_CSUM[0m
def_bool y
depends on [31mCONFIG_SUPERH64[0m
config [31mCONFIG_GENERIC_HWEIGHT[0m
def_bool y
config [31mCONFIG_GENERIC_CALIBRATE_DELAY[0m
bool
config [31mCONFIG_GENERIC_LOCKBREAK[0m
def_bool y
depends on [31mCONFIG_SMP[0m && [31mCONFIG_PREEMPT[0m
config [31mCONFIG_ARCH_SUSPEND_POSSIBLE[0m
def_bool n
config [31mCONFIG_ARCH_HIBERNATION_POSSIBLE[0m
def_bool n
config [31mCONFIG_SYS_SUPPORTS_APM_EMULATION[0m
bool
select [31mCONFIG_ARCH_SUSPEND_POSSIBLE[0m
config [31mCONFIG_SYS_SUPPORTS_HUGETLBFS[0m
bool
config [31mCONFIG_SYS_SUPPORTS_SMP[0m
bool
config [31mCONFIG_SYS_SUPPORTS_NUMA[0m
bool
config [31mCONFIG_STACKTRACE_SUPPORT[0m
def_bool y
config [31mCONFIG_LOCKDEP_SUPPORT[0m
def_bool y
config [31mCONFIG_ARCH_HAS_ILOG2_U32[0m
def_bool n
config [31mCONFIG_ARCH_HAS_ILOG2_U64[0m
def_bool n
config [31mCONFIG_NO_IOPORT_MAP[0m
def_bool ![31mCONFIG_PCI[0m
depends on ![31mCONFIG_SH_CAYMAN[0m && ![31mCONFIG_SH_SH4202_MICRODEV[0m && ![31mCONFIG_SH_SHMIN[0m && \
![31mCONFIG_SH_HP6XX[0m && ![31mCONFIG_SH_SOLUTION_ENGINE[0m
config [31mCONFIG_IO_TRAPPED[0m
bool
config [31mCONFIG_SWAP_IO_SPACE[0m
bool
config [31mCONFIG_DMA_COHERENT[0m
bool
config [31mCONFIG_DMA_NONCOHERENT[0m
def_bool ![31mCONFIG_DMA_COHERENT[0m
select [31mCONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE[0m
config [31mCONFIG_PGTABLE_LEVELS[0m
default 3 if [31mCONFIG_X2TLB[0m
default 2
menu "System type"
#
# Processor families
#
config [31mCONFIG_CPU_SH2[0m
bool
select [31mCONFIG_SH_INTC[0m
config [31mCONFIG_CPU_SH2A[0m
bool
select [31mCONFIG_CPU_SH2[0m
select [31mCONFIG_UNCACHED_MAPPING[0m
config [31mCONFIG_CPU_J2[0m
bool
select [31mCONFIG_CPU_SH2[0m
select [31mCONFIG_OF[0m
select [31mCONFIG_OF_EARLY_FLATTREE[0m
config [31mCONFIG_CPU_SH3[0m
bool
select [31mCONFIG_CPU_HAS_INTEVT[0m
select [31mCONFIG_CPU_HAS_SR_RB[0m
select [31mCONFIG_SH_INTC[0m
select [31mCONFIG_SYS_SUPPORTS_SH_TMU[0m
config [31mCONFIG_CPU_SH4[0m
bool
select [31mCONFIG_CPU_HAS_INTEVT[0m
select [31mCONFIG_CPU_HAS_SR_RB[0m
select [31mCONFIG_CPU_HAS_FPU[0m if ![31mCONFIG_CPU_SH4AL_DSP[0m
select [31mCONFIG_SH_INTC[0m
select [31mCONFIG_SYS_SUPPORTS_SH_TMU[0m
select [31mCONFIG_SYS_SUPPORTS_HUGETLBFS[0m if [31mCONFIG_MMU[0m
config [31mCONFIG_CPU_SH4A[0m
bool
select [31mCONFIG_CPU_SH4[0m
config [31mCONFIG_CPU_SH4AL_DSP[0m
bool
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_HAS_DSP[0m
config [31mCONFIG_CPU_SH5[0m
bool
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_TMU[0m
select [31mCONFIG_SYS_SUPPORTS_HUGETLBFS[0m if [31mCONFIG_MMU[0m
config [31mCONFIG_CPU_SHX2[0m
bool
config [31mCONFIG_CPU_SHX3[0m
bool
select [31mCONFIG_DMA_COHERENT[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_SYS_SUPPORTS_NUMA[0m
config [31mCONFIG_ARCH_SHMOBILE[0m
bool
select [31mCONFIG_ARCH_SUSPEND_POSSIBLE[0m
select [31mCONFIG_PM[0m
config [31mCONFIG_CPU_HAS_PMU[0m
depends on [31mCONFIG_CPU_SH4[0m || [31mCONFIG_CPU_SH4A[0m
default y
bool
if [31mCONFIG_SUPERH32[0m
choice
prompt "Processor sub-type selection"
#
# Processor subtypes
#
# SH-2 Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7619[0m
bool "Support SH7619 processor"
select [31mCONFIG_CPU_SH2[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
config [31mCONFIG_CPU_SUBTYPE_J2[0m
bool "Support J2 processor"
select [31mCONFIG_CPU_J2[0m
select [31mCONFIG_SYS_SUPPORTS_SMP[0m
select [31mCONFIG_GENERIC_CLOCKEVENTS_BROADCAST[0m if [31mCONFIG_SMP[0m
# SH-2A Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7201[0m
bool "Support SH7201 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
config [31mCONFIG_CPU_SUBTYPE_SH7203[0m
bool "Support SH7203 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_SH7206[0m
bool "Support SH7206 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
config [31mCONFIG_CPU_SUBTYPE_SH7263[0m
bool "Support SH7263 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
config [31mCONFIG_CPU_SUBTYPE_SH7264[0m
bool "Support SH7264 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_SH7269[0m
bool "Support SH7269 processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_CPU_HAS_FPU[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_MXG[0m
bool "Support MX-G processor"
select [31mCONFIG_CPU_SH2A[0m
select [31mCONFIG_SYS_SUPPORTS_SH_MTU2[0m
help
Select MX-[31mCONFIG_G[0m if running on an R8A03022BG part.
# SH-3 Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7705[0m
bool "Support SH7705 processor"
select [31mCONFIG_CPU_SH3[0m
config [31mCONFIG_CPU_SUBTYPE_SH7706[0m
bool "Support SH7706 processor"
select [31mCONFIG_CPU_SH3[0m
help
Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7707[0m
bool "Support SH7707 processor"
select [31mCONFIG_CPU_SH3[0m
help
Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7708[0m
bool "Support SH7708 processor"
select [31mCONFIG_CPU_SH3[0m
help
Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
if you have a 100 Mhz SH-3 HD6417708R CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7709[0m
bool "Support SH7709 processor"
select [31mCONFIG_CPU_SH3[0m
help
Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7710[0m
bool "Support SH7710 processor"
select [31mCONFIG_CPU_SH3[0m
select [31mCONFIG_CPU_HAS_DSP[0m
help
Select SH7710 if you have a SH3-DSP SH7710 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7712[0m
bool "Support SH7712 processor"
select [31mCONFIG_CPU_SH3[0m
select [31mCONFIG_CPU_HAS_DSP[0m
help
Select SH7712 if you have a SH3-DSP SH7712 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7720[0m
bool "Support SH7720 processor"
select [31mCONFIG_CPU_SH3[0m
select [31mCONFIG_CPU_HAS_DSP[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_USB_OHCI_SH[0m if [31mCONFIG_USB_OHCI_HCD[0m
select [31mCONFIG_PINCTRL[0m
help
Select SH7720 if you have a SH3-DSP SH7720 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7721[0m
bool "Support SH7721 processor"
select [31mCONFIG_CPU_SH3[0m
select [31mCONFIG_CPU_HAS_DSP[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_USB_OHCI_SH[0m if [31mCONFIG_USB_OHCI_HCD[0m
help
Select SH7721 if you have a SH3-DSP SH7721 CPU.
# SH-4 Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7750[0m
bool "Support SH7750 processor"
select [31mCONFIG_CPU_SH4[0m
help
Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7091[0m
bool "Support SH7091 processor"
select [31mCONFIG_CPU_SH4[0m
help
Select SH7091 if you have an SH-4 based Sega device (such as
the Dreamcast, Naomi, and Naomi 2).
config [31mCONFIG_CPU_SUBTYPE_SH7750R[0m
bool "Support SH7750R processor"
select [31mCONFIG_CPU_SH4[0m
config [31mCONFIG_CPU_SUBTYPE_SH7750S[0m
bool "Support SH7750S processor"
select [31mCONFIG_CPU_SH4[0m
config [31mCONFIG_CPU_SUBTYPE_SH7751[0m
bool "Support SH7751 processor"
select [31mCONFIG_CPU_SH4[0m
help
Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
or if you have a HD6417751R CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7751R[0m
bool "Support SH7751R processor"
select [31mCONFIG_CPU_SH4[0m
config [31mCONFIG_CPU_SUBTYPE_SH7760[0m
bool "Support SH7760 processor"
select [31mCONFIG_CPU_SH4[0m
config [31mCONFIG_CPU_SUBTYPE_SH4_202[0m
bool "Support SH4-202 processor"
select [31mCONFIG_CPU_SH4[0m
# SH-4A Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7723[0m
bool "Support SH7723 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_ARCH_SHMOBILE[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_PINCTRL[0m
help
Select SH7723 if you have an SH-MobileR2 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7724[0m
bool "Support SH7724 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_ARCH_SHMOBILE[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_PINCTRL[0m
help
Select SH7724 if you have an SH-MobileR2R CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7734[0m
bool "Support SH7734 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_PINCTRL[0m
help
Select SH7734 if you have a SH4A SH7734 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7757[0m
bool "Support SH7757 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_PINCTRL[0m
help
Select SH7757 if you have a SH4A SH7757 CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7763[0m
bool "Support SH7763 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_USB_OHCI_SH[0m if [31mCONFIG_USB_OHCI_HCD[0m
help
Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
config [31mCONFIG_CPU_SUBTYPE_SH7770[0m
bool "Support SH7770 processor"
select [31mCONFIG_CPU_SH4A[0m
config [31mCONFIG_CPU_SUBTYPE_SH7780[0m
bool "Support SH7780 processor"
select [31mCONFIG_CPU_SH4A[0m
config [31mCONFIG_CPU_SUBTYPE_SH7785[0m
bool "Support SH7785 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_NUMA[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_SH7786[0m
bool "Support SH7786 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX3[0m
select [31mCONFIG_CPU_HAS_PTEAEX[0m
select [31mCONFIG_GENERIC_CLOCKEVENTS_BROADCAST[0m if [31mCONFIG_SMP[0m
select [31mCONFIG_USB_OHCI_SH[0m if [31mCONFIG_USB_OHCI_HCD[0m
select [31mCONFIG_USB_EHCI_SH[0m if [31mCONFIG_USB_EHCI_HCD[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_SHX3[0m
bool "Support SH-X3 processor"
select [31mCONFIG_CPU_SH4A[0m
select [31mCONFIG_CPU_SHX3[0m
select [31mCONFIG_GENERIC_CLOCKEVENTS_BROADCAST[0m if [31mCONFIG_SMP[0m
select [31mCONFIG_GPIOLIB[0m
select [31mCONFIG_PINCTRL[0m
# SH4AL-DSP Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH7343[0m
bool "Support SH7343 processor"
select [31mCONFIG_CPU_SH4AL_DSP[0m
select [31mCONFIG_ARCH_SHMOBILE[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
config [31mCONFIG_CPU_SUBTYPE_SH7722[0m
bool "Support SH7722 processor"
select [31mCONFIG_CPU_SH4AL_DSP[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_ARCH_SHMOBILE[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_NUMA[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
select [31mCONFIG_PINCTRL[0m
config [31mCONFIG_CPU_SUBTYPE_SH7366[0m
bool "Support SH7366 processor"
select [31mCONFIG_CPU_SH4AL_DSP[0m
select [31mCONFIG_CPU_SHX2[0m
select [31mCONFIG_ARCH_SHMOBILE[0m
select [31mCONFIG_ARCH_SPARSEMEM_ENABLE[0m
select [31mCONFIG_SYS_SUPPORTS_NUMA[0m
select [31mCONFIG_SYS_SUPPORTS_SH_CMT[0m
endchoice
endif
if [31mCONFIG_SUPERH64[0m
choice
prompt "Processor sub-type selection"
# SH-5 Processor Support
config [31mCONFIG_CPU_SUBTYPE_SH5_101[0m
bool "Support SH5-101 processor"
select [31mCONFIG_CPU_SH5[0m
config [31mCONFIG_CPU_SUBTYPE_SH5_103[0m
bool "Support SH5-103 processor"
select [31mCONFIG_CPU_SH5[0m
endchoice
endif
source "arch/sh/mm/Kconfig"
source "arch/sh/Kconfig.cpu"
source "arch/sh/boards/Kconfig"
menu "Timer and clock configuration"
config [31mCONFIG_SH_PCLK_FREQ[0m
int "Peripheral clock frequency (in Hz)"
depends on [31mCONFIG_SH_CLK_CPG_LEGACY[0m
default "31250000" if [31mCONFIG_CPU_SUBTYPE_SH7619[0m
default "33333333" if [31mCONFIG_CPU_SUBTYPE_SH7770[0m || \
[31mCONFIG_CPU_SUBTYPE_SH7760[0m || \
[31mCONFIG_CPU_SUBTYPE_SH7705[0m || \
[31mCONFIG_CPU_SUBTYPE_SH7203[0m || \
[31mCONFIG_CPU_SUBTYPE_SH7206[0m || \
[31mCONFIG_CPU_SUBTYPE_SH7263[0m || \
[31mCONFIG_CPU_SUBTYPE_MXG[0m
default "60000000" if [31mCONFIG_CPU_SUBTYPE_SH7751[0m || [31mCONFIG_CPU_SUBTYPE_SH7751R[0m
default "66000000" if [31mCONFIG_CPU_SUBTYPE_SH4_202[0m
default "50000000"
help
This option is used to specify the peripheral clock frequency.
This is necessary for determining the reference clock value on
platforms lacking an [31mCONFIG_RTC[0m.
config [31mCONFIG_SH_CLK_CPG[0m
def_bool y
config [31mCONFIG_SH_CLK_CPG_LEGACY[0m
depends on [31mCONFIG_SH_CLK_CPG[0m
def_bool y if ![31mCONFIG_CPU_SUBTYPE_SH7785[0m && ![31mCONFIG_ARCH_SHMOBILE[0m && \
![31mCONFIG_CPU_SHX3[0m && ![31mCONFIG_CPU_SUBTYPE_SH7757[0m && \
![31mCONFIG_CPU_SUBTYPE_SH7734[0m && ![31mCONFIG_CPU_SUBTYPE_SH7264[0m && \
![31mCONFIG_CPU_SUBTYPE_SH7269[0m
endmenu
menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
endmenu
source "arch/sh/drivers/Kconfig"
endmenu
menu "Kernel features"
source "kernel/Kconfig.hz"
config [31mCONFIG_KEXEC[0m
bool "kexec system call (EXPERIMENTAL)"
depends on [31mCONFIG_SUPERH32[0m && [31mCONFIG_MMU[0m
select [31mCONFIG_KEXEC_CORE[0m
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
but it is independent of the system firmware. And like a reboot
you can start any kernel with it, not just Linux.
The name comes from the similarity to the exec system call.
It is an ongoing process to be certain the hardware in a machine
is properly shutdown, so do not be surprised if this code does not
initially work for you. As of this writing the exact hardware
interface is strongly in flux, so no good recommendation can be
made.
config [31mCONFIG_CRASH_DUMP[0m
bool "kernel crash dumps (EXPERIMENTAL)"
depends on [31mCONFIG_SUPERH32[0m && [31mCONFIG_BROKEN_ON_SMP[0m
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
which are loaded in the main kernel with kexec-tools into
a specially reserved region and then later executed after
a crash by kdump/kexec. The crash dump kernel must be compiled
to a memory address not used by the main kernel using
[31mCONFIG_PHYSICAL_START[0m.
For more details see Documentation/admin-guide/kdump/kdump.rst
config [31mCONFIG_KEXEC_JUMP[0m
bool "kexec jump (EXPERIMENTAL)"
depends on [31mCONFIG_SUPERH32[0m && [31mCONFIG_KEXEC[0m && [31mCONFIG_HIBERNATION[0m
help
Jump between original kernel and kexeced kernel and invoke
code via [31mCONFIG_KEXEC[0m
config [31mCONFIG_PHYSICAL_START[0m
hex "Physical address where the kernel is loaded" if ([31mCONFIG_EXPERT[0m || [31mCONFIG_CRASH_DUMP[0m)
default [31mCONFIG_MEMORY_START[0m
---help---
This gives the physical address where the kernel is loaded
and is ordinarily the same as [31mCONFIG_MEMORY_START[0m.
Different values are primarily used in the case of kexec on panic
where the fail safe kernel needs to run at a different address
than the panic-ed kernel.
config [31mCONFIG_SECCOMP[0m
bool "Enable seccomp to safely compute untrusted bytecode"
depends on [31mCONFIG_PROC_FS[0m
help
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
execution. By using pipes or other transports made available to
the process as file descriptors supporting the read/write
syscalls, it's possible to isolate those applications in
their own address space using seccomp. Once seccomp is
enabled via prctl, it cannot be disabled and the task is only
allowed to execute a few safe syscalls defined by each seccomp
mode.
If unsure, say N.
config [31mCONFIG_SMP[0m
bool "Symmetric multi-processing support"
depends on [31mCONFIG_SYS_SUPPORTS_SMP[0m
---help---
This enables support for systems with more than one CPU. If you have
a system with only one CPU, say N. If you have a system with more
than one CPU, say Y.
If you say N here, the kernel will run on uni- and multiprocessor
machines, but will use only one CPU of a multiprocessor machine. If
you say Y here, the kernel will run on many, but not all,
uniprocessor machines. On a uniprocessor machine, the kernel
will run faster if you say N here.
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the [31mCONFIG_SMP[0m-HOWTO
available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
config [31mCONFIG_NR_CPUS[0m
int "Maximum number of CPUs (2-32)"
range 2 32
depends on [31mCONFIG_SMP[0m
default "4" if [31mCONFIG_CPU_SUBTYPE_SHX3[0m
default "2"
help
This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 and the
minimum value which makes sense is 2.
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image.
config [31mCONFIG_HOTPLUG_CPU[0m
bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
depends on [31mCONFIG_SMP[0m
help
Say Y here to experiment with turning CPUs off and on. CPUs
can be controlled through /sys/devices/system/cpu.
config [31mCONFIG_GUSA[0m
def_bool y
depends on ![31mCONFIG_SMP[0m && [31mCONFIG_SUPERH32[0m
help
This enables support for gUSA (general UserSpace Atomicity).
This is the default implementation for both UP and non-ll/sc
CPUs, and is used by the libc, amongst others.
For additional information, design information can be found
in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
This should only be disabled for special cases where alternate
atomicity implementations exist.
config [31mCONFIG_GUSA_RB[0m
bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
depends on [31mCONFIG_GUSA[0m && [31mCONFIG_CPU_SH3[0m || ([31mCONFIG_CPU_SH4[0m && ![31mCONFIG_CPU_SH4A[0m)
help
Enabling this option will allow the kernel to implement some
atomic operations using a software implementation of load-locked/
store-conditional (LLSC). On machines which do not have hardware
LLSC, this should be more efficient than the other alternative of
disabling interrupts around the atomic sequence.
config [31mCONFIG_HW_PERF_EVENTS[0m
bool "Enable hardware performance counter support for perf events"
depends on [31mCONFIG_PERF_EVENTS[0m && [31mCONFIG_CPU_HAS_PMU[0m
default y
help
Enable hardware performance counter support for perf events. If
disabled, perf events will use software events only.
source "drivers/sh/Kconfig"
endmenu
menu "Boot options"
config [31mCONFIG_USE_BUILTIN_DTB[0m
bool "Use builtin DTB"
default n
depends on [31mCONFIG_SH_DEVICE_TREE[0m
help
Link a device tree blob for particular hardware into the kernel,
suppressing use of the DTB pointer provided by the bootloader.
This option should only be used with legacy bootloaders that are
not capable of providing a DTB to the kernel, or for experimental
hardware without stable device tree bindings.
config [31mCONFIG_BUILTIN_DTB_SOURCE[0m
string "Source file for builtin DTB"
default ""
depends on [31mCONFIG_USE_BUILTIN_DTB[0m
help
Base name (without suffix, relative to arch/sh/boot/dts) for the
a DTS file that will be used to produce the DTB linked into the
kernel.
config [31mCONFIG_ZERO_PAGE_OFFSET[0m
hex
default "0x00010000" if [31mCONFIG_PAGE_SIZE_64KB[0m || [31mCONFIG_SH_RTS7751R2D[0m || \
[31mCONFIG_SH_7751_SOLUTION_ENGINE[0m
default "0x00004000" if [31mCONFIG_PAGE_SIZE_16KB[0m || [31mCONFIG_SH_SH03[0m
default "0x00002000" if [31mCONFIG_PAGE_SIZE_8KB[0m
default "0x00001000"
help
This sets the default offset of zero page.
config [31mCONFIG_BOOT_LINK_OFFSET[0m
hex
default "0x00210000" if [31mCONFIG_SH_SHMIN[0m
default "0x00400000" if [31mCONFIG_SH_CAYMAN[0m
default "0x00810000" if [31mCONFIG_SH_7780_SOLUTION_ENGINE[0m
default "0x009e0000" if [31mCONFIG_SH_TITAN[0m
default "0x01800000" if [31mCONFIG_SH_SDK7780[0m
default "0x02000000" if [31mCONFIG_SH_EDOSK7760[0m
default "0x00800000"
help
This option allows you to set the link address offset of the zImage.
This can be useful if you are on a board which has a small amount of
memory.
config [31mCONFIG_ENTRY_OFFSET[0m
hex
default "0x00001000" if [31mCONFIG_PAGE_SIZE_4KB[0m
default "0x00002000" if [31mCONFIG_PAGE_SIZE_8KB[0m
default "0x00004000" if [31mCONFIG_PAGE_SIZE_16KB[0m
default "0x00010000" if [31mCONFIG_PAGE_SIZE_64KB[0m
default "0x00000000"
config [31mCONFIG_ROMIMAGE_MMCIF[0m
bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
depends on [31mCONFIG_CPU_SUBTYPE_SH7724[0m
help
Say Y here to include experimental MMCIF loading code in
romImage. With this enabled it is possible to write the romImage
kernel image to an [31mCONFIG_MMC[0m card and boot the kernel straight from
the reset vector. At reset the processor Mask [31mCONFIG_ROM[0m will load the
first part of the romImage which in turn loads the rest the kernel
image to RAM using the MMCIF hardware block.
choice
prompt "Kernel command line"
optional
default [31mCONFIG_CMDLINE_OVERWRITE[0m
help
Setting this option allows the kernel command line arguments
to be set.
config [31mCONFIG_CMDLINE_OVERWRITE[0m
bool "Overwrite bootloader kernel arguments"
help
Given string will overwrite any arguments passed in by
a bootloader.
config [31mCONFIG_CMDLINE_EXTEND[0m
bool "Extend bootloader kernel arguments"
help
Given string will be concatenated with arguments passed in
by a bootloader.
endchoice
config [31mCONFIG_CMDLINE[0m
string "Kernel command line arguments string"
depends on [31mCONFIG_CMDLINE_OVERWRITE[0m || [31mCONFIG_CMDLINE_EXTEND[0m
default "console=ttySC1,115200"
endmenu
menu "Bus options"
config [31mCONFIG_SUPERHYWAY[0m
tristate "SuperHyway Bus support"
depends on [31mCONFIG_CPU_SUBTYPE_SH4_202[0m
config [31mCONFIG_MAPLE[0m
bool "Maple Bus support"
depends on [31mCONFIG_SH_DREAMCAST[0m
help
The Maple Bus is SEGA's serial communication bus for peripherals
on the Dreamcast. Without this bus support you won't be able to
get your Dreamcast keyboard etc to work, so most users
probably want to say 'Y' here, unless you are only using the
Dreamcast with a serial line terminal or a remote network
connection.
endmenu
menu "Power management options (EXPERIMENTAL)"
source "kernel/power/Kconfig"
source "drivers/cpuidle/Kconfig"
endmenu