# SPDX-License-Identifier: GPL-2.0-only # # Phy drivers for Qualcomm and Atheros platforms # config [31mCONFIG_PHY_ATH79_USB[0m tristate "Atheros AR71XX/9XXX USB PHY driver" depends on [31mCONFIG_OF[0m && ([31mCONFIG_ATH79[0m || [31mCONFIG_COMPILE_TEST[0m) default y if [31mCONFIG_USB_EHCI_HCD_PLATFORM[0m || [31mCONFIG_USB_OHCI_HCD_PLATFORM[0m select [31mCONFIG_RESET_CONTROLLER[0m select [31mCONFIG_GENERIC_PHY[0m help Enable this to support the [31mCONFIG_USB[0m PHY on Atheros AR71XX/9XXX SoCs. config [31mCONFIG_PHY_QCOM_APQ8064_SATA[0m tristate "Qualcomm APQ8064 SATA SerDes/PHY driver" depends on [31mCONFIG_ARCH_QCOM[0m depends on [31mCONFIG_HAS_IOMEM[0m depends on [31mCONFIG_OF[0m select [31mCONFIG_GENERIC_PHY[0m config [31mCONFIG_PHY_QCOM_IPQ806X_SATA[0m tristate "Qualcomm IPQ806x SATA SerDes/PHY driver" depends on [31mCONFIG_ARCH_QCOM[0m depends on [31mCONFIG_HAS_IOMEM[0m depends on [31mCONFIG_OF[0m select [31mCONFIG_GENERIC_PHY[0m config [31mCONFIG_PHY_QCOM_PCIE2[0m tristate "Qualcomm PCIe Gen2 PHY Driver" depends on [31mCONFIG_OF[0m && [31mCONFIG_COMMON_CLK[0m && ([31mCONFIG_ARCH_QCOM[0m || [31mCONFIG_COMPILE_TEST[0m) select [31mCONFIG_GENERIC_PHY[0m help Enable this to support the Qualcomm PCIe PHY, used with the Synopsys based PCIe controller. config [31mCONFIG_PHY_QCOM_QMP[0m tristate "Qualcomm QMP PHY Driver" depends on [31mCONFIG_OF[0m && [31mCONFIG_COMMON_CLK[0m && ([31mCONFIG_ARCH_QCOM[0m || [31mCONFIG_COMPILE_TEST[0m) select [31mCONFIG_GENERIC_PHY[0m help Enable this to support the QMP PHY transceiver that is used with controllers such as PCIe, UFS, and [31mCONFIG_USB[0m on Qualcomm chips. config [31mCONFIG_PHY_QCOM_QUSB2[0m tristate "Qualcomm QUSB2 PHY Driver" depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARCH_QCOM[0m || [31mCONFIG_COMPILE_TEST[0m) depends on [31mCONFIG_NVMEM[0m || ![31mCONFIG_NVMEM[0m select [31mCONFIG_GENERIC_PHY[0m help Enable this to support the HighSpeed QUSB2 PHY transceiver for [31mCONFIG_USB[0m controllers on Qualcomm chips. This driver supports the high-speed PHY which is usually paired with either the ChipIdea or Synopsys DWC3 [31mCONFIG_USB[0m IPs on MSM SOCs. config [31mCONFIG_PHY_QCOM_UFS[0m tristate "Qualcomm UFS PHY driver" depends on [31mCONFIG_OF[0m && [31mCONFIG_ARCH_QCOM[0m select [31mCONFIG_GENERIC_PHY[0m help Support for UFS PHY on QCOM chipsets. if [31mCONFIG_PHY_QCOM_UFS[0m config [31mCONFIG_PHY_QCOM_UFS_14NM[0m tristate default [31mCONFIG_PHY_QCOM_UFS[0m help Support for 14nm UFS QMP phy present on QCOM chipsets. config [31mCONFIG_PHY_QCOM_UFS_20NM[0m tristate default [31mCONFIG_PHY_QCOM_UFS[0m depends on [31mCONFIG_BROKEN[0m help Support for 20nm UFS QMP phy present on QCOM chipsets. endif config [31mCONFIG_PHY_QCOM_USB_HS[0m tristate "Qualcomm USB HS PHY module" depends on [31mCONFIG_USB_ULPI_BUS[0m depends on [31mCONFIG_EXTCON[0m || ![31mCONFIG_EXTCON[0m # if [31mCONFIG_EXTCON[0m=m, this cannot be built-in select [31mCONFIG_GENERIC_PHY[0m help Support for the [31mCONFIG_USB[0m high-speed ULPI compliant phy on Qualcomm chipsets. config [31mCONFIG_PHY_QCOM_USB_HSIC[0m tristate "Qualcomm USB HSIC ULPI PHY module" depends on [31mCONFIG_USB_ULPI_BUS[0m select [31mCONFIG_GENERIC_PHY[0m help Support for the [31mCONFIG_USB[0m HSIC ULPI compliant PHY on QCOM chipsets. |