Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 985 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 796 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 845 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 7372 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 818 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 856 (as a macro)

Referenced in 4 files:

• drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c, line 58
• drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c, line 56
• drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c, line 67
• drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c, line 57