Defined in 9 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 1639 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 1469 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 1568 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 1994 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 1229 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 1348 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 10521 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 12832 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 11402 (as a macro)

Referenced in 2 files:

• drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c
  • line 152
  • line 202
  • line 234
• drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c
  • line 181
  • line 231
  • line 263