Defined in 6 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 238 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 1402 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 992 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 954 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h, line 1576 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h, line 778 (as a macro)